View STV7778S_187103.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

STV7778S
DEFLECTION PROCESSOR FOR MULTISYNC MONITOR
. . . . . . . . . . . . . . . . . . . . .
HORIZONTAL DUAL PLL CONCEPT SELF-ADAPTIVE (30 TO 70kHz) X-RAY PROTECTION INPUT DC ADJUSTABLE DUTY-CYCLE INTERNAL 1st PLL LOCK/UNLOCK IDENTIFICATION WIDE RANGE DC CONTROLLED H-POSITION ON/OFF SWITCH (FOR PWR MANAGEMENT) TWO H-DRIVE POLARITIES VERTICAL VERTICAL RAMP GENERATOR 45 TO 120Hz AGC LOOP DC CONTROLLED V-AMP, V-POS, S-AMP AND S-CENTERING ON/OFF SWITCH B+ REGULATOR INTERNAL PWM GENERATOR FOR B+ CURRENT MODE STEP-UP CONVERTER DC ADJUSTABLE B+ VOLTAGE OUTPUT PULSES SYNCHRONISED ON HORIZONTAL FREQUENCY INTERNAL MAX CURRENT LIMITATION EWPCC VERTICAL PARABOLA GENERATOR WITH DC CONTROLLED KEYSTONE AND AMPLITUDE GENERAL COMPARED WITH THE STV7778, THE STV7778S HAS AN INTERNAL METAL SHIELD PROTECTION AGAINST OVERVOLTAGE. POS/NEG H AND V SYNC POL SEPARATED H AND V TTL INPUT SAFETY BLANKING OUTPUT
The goal of this IC is to control all the functions related to the horizontal and vertical deflection in a multimodes or multisync monitor. As can be seen in the block diagram, the STV7778S includes the following functions : - Positive or Negative sync polarities, - Auto-sync horizontal processing, - H-PLL lock/unlock identification, - Auto-sync Vertical processing, - East/West signal processing block, - B+ controller, - Safety blanking output. An internal metal shield give to the STV7778S more immunity against electromagnetic and electrostatic fields, and therefore, additional safety for critical applications (for example, in case of CRTs with small coated area).
SHRINK42 (Plastic Package) ORDER CODE : STV7778S
DESCRIPTION The STV7778S is a monolithic integrated circuit assembled in a 42 pins shrunk dual in line plastic package.
September 1998 1/11
STV7778S
PIN CONNECTIONS
PLL2C H-DUTY HFLY HGND HREF NC NC NC NC C0 R0 PLL1F HLOCK-CAP FH-MIN H-POS XRAY-IN HSYNC VCC GND H-OUTEM H-OUTCOL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 ISENSE COMP REGIN B+-ADJ KEYST E/W-AMP E/WOUT PLL1INHIB VSYNC V-POS VDCOUT V-AMP VOUT VS-CENT VS-AMP VCAP VREF VAGCCAP VDND
7778S-01.EPS
SBLKOUT B+OUT
2/11
STV7778S
PIN-OUT DESCRIPTION
Pin N 1 2 Name PLL2C H-DUTY Second PLL Loop Filter DC Control of Horizontal Drive Output Pulse Duty-cycle. If this pin is grounded, the horizontal and vertical outputs are inhibited. By connecting a capacitor on this pin a soft-start function may be realized on h-drive output. Horizontal Flyback Input (Positive Polarity) Horizontal Section Ground. Must be connected only to components related to H blocks. Horizontal Section Reference Voltage. Must be filtered by capacitor to Pin 4 Function
3 4 5 6 7 8 9 10 11 12 13
H-FLY H-GND H-REF NC NC NC NC C0 R0 PLL1F HLOCK-CAP
Horizontal Oscillator Capacitor. To be connected to Pin 4. Horizontal Oscillator Resistor. To be connected to Pin 4. First PLL Loop Filter. To be connected to Pin 4. First PLL Lock/Unlock Time Constant Capacitor. Capacitor filtering the frequency change detected on Pin13. When frequency is changing, a blanking pulse is generated on Pin 23, the duration of this pulse is proportionnal to the capacitor on Pin 13. To be connected to Pin 4. DC Control for Free Running Frequency Setting. Comming from DAC output or DC voltage generated by a resistor bridge connected between Pin 5 and 4. DC Control for Horizontal Centering X-RAY Protection Input (with internal latch function) TTL Horizontal Sync Input Supply Voltage (12V Typical) Ground Horizontal Drive Output (emiter of internal transistor) Horizontal Drive Output (open collector of internal transistor) B+ PWM Regulator Output Safety Blanking Output. Activated during frequency changes, when X-RAY input is triggered or when VS is too low. Vertical Section Signal Ground Memory Capacitor for Automatic Gain Control Loop in Vertical Ramp Generator Vertical Section Reference Voltage Vertical Sawtooth Generator Capacitor DC Control of Vertical S Shape Amplitude DC Control of Vertical S Centering Vertical Ramp Output (with frequency independant amplitude and S-correction) DC Control of Vertical Amplitude Adjustment Vertical Position Reference Voltage Output Temperature Matched with V-AMP Output DC Control of Vertical Position Adjustment Vertical TTL Sync Input TTL Input for PLL1 Output Current Inhibition (To be used in case of comp sync input signal) East/West Pincushion Correction Parabola Output DC Control of East/West Pincushion Correction Amplitude DC Control of Keystone Correction DC Control of B+ Adjustment Regulation Input of B+ Control Loop B+ Error Amplifier Output for Frequency Compensation and Gain Setting Sensing of External B+ Switching Transistor Emiter Current 3/11
14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42
FH-MIN H-POS XRAY-IN H-SYNC VCC GND H-OUTEM H-OUTCOL B+ OUT SBLK OUT VGND VAGCCAP VREF VCAP VS-AMP VS-CENT VOUT V-AMP VDCOUT V-POS VSYNC PLL1INHIB E/WOUT E/W-AMP KEYST B+ ADJ REGIN COMP ISENSE
7778S-01.TBL
STV7778S
BLOCK DIAGRAM
HLOCK-CAP H-OUTCOL PLL1INHIB H-OUTEM H-DUTY FH-MIN H-POS
35
15 12 11 10 14 13
3
PLL2C
PLL1F
HFLY
R0
C0
1
2
20
21
HSYNC 17
INPUT INTERFACE
1st PHASE COMP
VCO
2nd PHASE COMP
PULSE SHAPER
OUTPUT BUFFER
23 SBLKOUT LOCK DETECT XRAY-IN 16 HREF HGND 5 H-VREF 4 BANDGAP VREF 26 VGND 24 V-VREF SAFETY PROCESSOR VCC Outputs Inhibition EA R 22 B+OUT S VREF 42 I SENSE
39 B+-ADJ
41 COMP 40 REGIN
PARABOLA GENERATOR VSYNC 34 INPUT INTERFACE 19
GND
36 E/WOUT
VERTICAL OSCILLATOR 27
VCAP
S CORRECTION 29
VS-CENT
18
VCC
25
VAGCCAP
28
VS-AMP
33
V-POS
31
V-AMP
30 32
VDCOUT VOUT
38
KEYST
37
E/W-AMP
STV7778S
7778S-02.EPS
4/11
STV7778S
ABSOLUTE MAX RATING
Symbol VCC VIN Supply Voltage (Pin 18) Max Voltage on Pins 2, 14, 15, 28, 29, 31, 33, 37, 38, 39 Pin 3 Pins 17, 34 Pin 40 Pin 42 Pin 16 Parameter Value 13.5 8 1.8 6 8 8 6 2 300 -40, +150 150 0, +70 Unit V V
VESD
ESD Succeptibility Human Body Model, 100pF Discharge through 1.5k EIAJ Norm, 200pF Discharge through 0 Storage Temperature Max Operating Junction Temperature Operating Temperature
kV V C C
7778S-02.TBL 7778S-04.TBL 7778S-03.TBL
Tstg Tj Toper
C
THERMAL DATA
Symbol Rth (j-a) Parameter Junction-Ambient Thermal Resistance Max. Value 65 Unit C/W
HORIZONTAL SECTION Operating conditions
Symbol VCO R0min C0min Fmax HsVR Oscillator Resistor Min Value Oscillator Capacitor Min Value Maximum Oscillator Frequency Horizontal Sync Input Voltage Pin 17 0 Pin 11 Pin 10 6 390 70 5.5 k pF kHz V S 25 % Parameter Test conditions Min. Typ. Max. Unit
INPUT SECTION MinD Mduty Minimum Input Pulses Duration Maximum Input Signal Duty Cycle Pin 17 Pin 17 1
OUTPUT SECTION I3m HOI1 HOI2 Maximum Input Peak Current on Pin 3 Horizontal Drive Output Max Current Horizontal Drive Output Max Current Pin 20, sourced current Pin 21, sunk current 2 20 20 mA mA mA
DC CONTROL VOLTAGES DCadj DC Voltage Range on DC Controls VREF-H = 8V, Pins 2-14-15 2 6 V
5/11
STV7778S
HORIZONTAL SECTION (continued) Electrical Characteristics (VCC = 12V, Tamb = 25C)
Symbol Parameter Test conditions Min. Typ. Max. Unit SUPPLY AND REFERENCE VOLTAGES VCC ICC VREF-H IREF-H VREF-V IREF-V Supply Voltage Supply Current Reference Voltage for Horizontal Section Max Sourced Current on VREF-H Reference Voltage for Vertical Section Max Sourced Current on VREF-V Pin 18 Pin 18, See Figure 1 Pin 5 Pin 5 Pin 26 Pin 26 7.4 8 7.4 10.8 12 40 8 13.2 60 8.6 2 8.6 2 V mA V mA V mA
INPUT SECTION/PLL1 VINTH VVCO VCOG Hph FFadj CR Hor Input Threshold Voltage Pin 17 VCO Control Voltage VCO Gain, dF/dV Pin 12 Horizontal Phase Adjustment (Pin 15) Free Running Frequency Adjustment (Pin 14) PLL1 Capture Range (F0 = 27kHz) Fh Min Fh Max PLL 1 Inhibition (Pin 35) PLL ON PLL OFF Low level voltage High level voltage VREF-H = 8V, Pin 12 R0 = 6.49k, C0 = 680pF % of Hor period Without H-sync Signal See conditions on Figure 1 28 70 V35 V35 0.8 2 kHz kHz V 0.8 2 1.6 15 10 20 6.2 V V V kHz/V % %
PLLinh
SECOND PLL AND HORIZONTAL OUTPUT SECTION FBth Hjit HDmin HDmin HDvd HDem XRAYth ISblkO VSblkO Vphi2 VOFF Flyback Input Threshold Voltage Horizontal Jitter Minimum Hor Drive Output Duty-cycle Maximum Hor Drive Output Duty-cycle Horizontal Drive Low Level Output Voltage Pin 20 or 21, V2 = 2V Pin 20 or 21, V2 = 6V V21-V20, Iout = 20mA, Pin 20 to GND 9.5 45 30 50 1.1 10 1.6 1.8 10 0.25 1.6 3.2 1 0.5 Pin 3 0.65 0.75 150 35 1.7 V ppm % % V V V mA V
7778S-05.TBL
Horizontal Drive High Level Output Voltage Pin 21 to VCC, IOUT = 20mA (output on Pin 20) X-RAY Protection Input Threshold Voltage Pin 16 Maximum Output Current on Safety Blanking I23 Output Low-Level Voltage on Safety Blanking Output V23 with I23 = 10mA Internal Clamping Voltage on 2nd PLL Loop Filter Vmin Output (Pin 1) Vmax Pin 2 Threshold Voltage to Stop H-out, V-out V2 B+out and to Activate S-BLK.OFF Mode when V2 < VOFF
V V V
6/11
STV7778S
B+ SECTION Operating Conditions
Symbol EAOI FeedRes Parameter Maximum Error Amplifier Output Current Minimum Feedback Resistor Test conditions Sourced by Pin 41 Sunk by Pin 41 Resistor between Pins 40 and 41 5 Min. Typ. Max. 0.5 2 Unit
7778S-06.TBL 7778S-08.TBL 7778S-07.TBL
mA mA k
Electrical Characteristics (VCC = 12V, Tamb = 25C)
Symbol OLG UGBW IRI EAOI CSG MCEth ISI Tonmax B+OSV IVref VREFADJ Parameter Error Amplifier Open Loop Gain Unity Gain Bandwidth Regulation Input Bias Current Maximum Guaranted Error Amplifier Output Current Current Sense Input Voltage Gain Max Curent Sense Input Threshold Voltage Current Sense Input Bias Current Maximum External Power Transistor on Time B+ Output Low Level Saturation Voltage Internal Reference Voltage Internal Reference Voltage Adjustment Test conditions At low frequency (see Note 1) (see Note 1) Current sourced by Pin 40 (PNP base) Current sourced by Pin 41 Current sink by Pin 41 Pin 42 Pin 42 Current sunk by Pin 42 (NPN base) % of H-period, @ f0 = 27kHz V22 with I22 = 10mA On error amp (+) input for V39 = 4V 2V < V39 < 6V 0.5 2 3 1.2 1 75 0.25 4.9 14 V A % V V % Min. Typ. 85 6 0.2 Max. Unit dB MHz A mA mA
EAST WEST PARABOLA GENERATOR Electrical Characteristics (VCC = 12V, Tamb = 25C)
Symbol Vsym Parameter Parabola Symetry Adjustment Capability (for Keystone Adjustment ; with Pin 38) Test conditions See Figure 2 ; Internal voltage V38 = 2V V38 = 4V V38 = 6V See Figure 2 ; V37 = 4V V38 = 2V V38 = 6V V38 = 4.3V, V28 = 2V V37 = 2V 2V < V37 < 6V 3.3 2.4 Min. Typ. Max. Unit V 3.2 3.5 3.8 2.3 2.0 3.8 3 4.3 V
Kadj
Keystone Adjustment Capability B/A ratio A/B ratio Parabola Amplitude Adjustment Capability Maximum Amplitude on Pin 36 Maximum Ratio between Max and Min
Paramp
7/11
STV7778S
VERTICAL SECTION Operating Conditions
Symbol VSVR Parameter Vertical Sync Input Voltage Test conditions On Pin 34 Min. 0 Typ. Max. 5.5 Unit V
Electrical Characteristics (VCC = 12V, Tamb = 25C)
Symbol IBIASP IBIASN VSth VSBI VRB VRT VRTF IR27 Parameter Test conditions Pin 23-28-29 Bias Current (Current sourced For V23-28-29 = 2V by PNP base) Pin 31 Bias Current (Current sunk by NPN For V31 = 6V base) Pin 34; High-level Vertical Sync Input Threshold Voltage Low-level Vertical Sync Input Bias Current (Current Sourced by PNP Base) Voltage at Ramp Bottom Point Voltage at Ramp Top Point (with Sync) Voltage at Ramp Top Point (without Sync) Output Current Range on Pin 27 during Ramp Charging Time. Current to Charge Capacitor between Pin 27 and Ground Minimum Vertical Sync Pulse Width Vertical Sync Input Maximum Duty-cycle Vertical Sawtooth Discharge Time Duration Vertical Free Running Frequency (V28 = 2V) AUTO-SYNC Frequency (see Note 3) Ramp Amplitude Thermal Drift Ramp Amplitude Drift Versus Frequency Ramp Linearity on Pin 27 I27/I27 V34 = 0.8V On Pin 27 On Pin 27 On Pin 27 V28 = 2V (Note 2), 2V < V27 < 5V Min current Max current Pin 34 Pin 34 On Pin 27, with 150nF cap Measured on Pin 27, Cosc (Pin27) = 150nF With C27 = 150nF 5% On Pin 30 (see Note 1), (0C < Tamb < 70C) V31 = 6V, C27 = 150nF, 50Hz < F < 120Hz V28 = 2V, V25 = X = 4.3V, 2.5V < V27 < 4.5V Min. Typ. 2 0.5 2 0.8 1 2/8 5/8 VRT-0.1 Max. Unit A A V V A VREF-V VREF-V V A A S % S Hz Hz ppm/C ppm/Hz % M 3.2 3.5 3.8 2 2 3 4 7/16 5 -4 +4 3 3.5 4 3.3 V V V mA V V V VREF-V mA % % V V V
7778S-10.TBL
VSW VSmDut VSTD VFRF ASFR RATD RAFD Rlin Rload Vpos
100 5
15 135
20
15 85 100 50 100 200 0.5 50 120
IVPOS Vor
VOUTDC V0I dVS
Ccorr
Minimum Load on Pin 25 for less than 1% Vertical Amplitude Drift Vertical Position Adjustment Voltage on V33 = 2V Pin 32 V33 = 4V V33 = 6V Max Current on Vertical Position Control Output (Pin 32) Vertical Output Voltage (on Pin 30) V31 = 2V V31 = 4V (Peak to Peak Voltage on Pin 30) V31 = 6V DC Voltage on Vertical Output (Pin30) See Note 4 Vertical Output Maximum Output Current On Pin 30 Max Vertical S-Correction Amplitude V/V30pp at T/4 (V28 = 2V Inhibits S-CORR; V28 = 6V gives V/V30pp at 3T/4 Maximum S-CORR) (see Figure 3) C-Correction Adjustment Range Voltage on V29 = 2V Pin 27 for Maximum Slope on the Ramp V29 = 4V (with S-Correction) (see Figure 4) V29 = 6V
3.65
2.2
3.75
Notes : 1. These parameters are not tested on each unit. They are measured during our internal qualification procedure which includes characterization on batches comming from corners of our processes and also temperature characterization. 2. When 2V are applied on Pin 28 (Vertical S-Correction control), then the S-Correction is inhibited, consequently the sawtooth have a linear shape. 3. It is the frequency range for which the VERTICAL OSCILLATOR will automatically synchronize, using a single capacitor value on Pin 27 and with a constant ramp amplitude. 4. Typically 3.5V for Vertical reference voltage typical value (8V).
8/11
7778S-09.TBL
S6 12V
1.8kW
6.49kW
10nF 220nF 22nF 3 1 2 20 21 680pF 1% 10 14 13
Figure 1 : Testing Circuit
4.7F 15 12 11
35
17
INPUT INTERFACE VCO
1st PHASE COMP
2nd PHASE COMP
PULSE SHAPER
OUTPUT BUFFER 4.7kW 23 12V
LOCK DETECT
4.7kW
39 VREF R 22 S 470pF 10kW 41 40 47kW 10kW PARABOLA GENERATOR 36 42 3.9kW 12V
16
5 EA
2.2m F SAFETY PROCESSOR VCC Outputs Inhibition
H-VREF
4
BANDGAP
26
2.2m F
V-VREF
24
34 25 29 470nF 1% 28 33 31
INPUT INTERFACE 30
VERTICAL OSCILLATOR
S CORRECTION 32 38 37
19
18
27
STV7778S
12V S5
150nF 1%
STV7778S
9/11
7778S-06.EPS
STV7778S
Figure 2 : Keystone Adjustment
V36 A
V38 = 2V V38 = 4V V38 = 6V
B
V27
7778S-03.AI
3.8 3.5 3.2
Figure 3 : S Amplitude Adjustment
V30 V
V30pp
0
T/4
T/2
3T/4
T
7778S-04.AI
V increase when V28 increase. V = 0 when V28 = 0.
Figure 4 : C Correction Adjustment
V27
4.0V 3.5V 3.0V
7778S-05.AI
0
T
10/11
STV7778S
PACKAGE MECHANICAL DATA 42 PINS - PLASTIC PACKAGE
E E1
A1
A2
B
B1
e
L
A
e1 e2
D c E 42 22
.015 0,38 Gage Plane
1
21
SDIP42
e3 e2
Dimensions A A1 A2 B B1 c D E E1 e e1 e2 e3 L
Min. 0.51 3.05 0.36 0.76 0.23 37.85 15.24 12.70
Millimeters Typ.
Max. 5.08 4.57 0.56 1.14 0.38 38.35 16.00 14.48
Min. 0.020 0.120 0.0142 0.030 0.0090 1.490 0.60 0.50
Inches Typ.
Max. 0.200 0.180 0.0220 0.045 0.0150 1.510 0.629 0.570
3.81 0.46 1.02 0.25 38.10 13.72 1.778 15.24
0.150 0.0181 0.040 0.0098 1.5 0.540 0.070 0.60
2.54
3.30
0.10
0.130
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1998 STMicroelectronics - All Rights Reserved Purchase of I2C Components of STMicroelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com
11/11
SDIP42.TBL
18.54 1.52 3.56
0.730 0.060 0.140
PMSDIP42.EPS

▲Up To Search▲

Price & Availability of STV7778S

	To Download STV7778S Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .